All
Why is a slower MIP rate with new z10 instructions better? The answer based on the initial results of problem #18 solution posted today on the ZMFACC Mainframe Assembler Coding Contest would appear to be that by using the new compare and branch instruction for z10 replacing 2 separate compare and branch on condition instructions results in a lower MIP rate but a faster execution time. Even though the MIP rate is lower, there are fewer instructions required to do the same work, and the elapsed time required is less. For the solution posted, the MIP rate using z390 on Intel Duo Core 2.1 GHZ processor dropped from 8.7 to 7.3 MIPS or 15%but the elapsed time also dropped from 343 ms to 271 ms or an 8% reduction in elapsed time. To see the source code and execution log output for this solution plus new problem #19 posting visit:
http://z390.sourceforge.net/z390_Mainframe_Assemble_Coding_Contest.htm
Don Higgins
don@higgins.net
Friday, March 21, 2008
Friday, March 14, 2008
z390 with 11 new ASSIST and 226 new z10 instructions
You never know what will happen at SHARE. This year SHARE started several new ventures for the z390 project resulting in the release of v1.4.01 today with the following major additions:
1. The ASSIST instructions for simplifying assembler program I/O have been added at the request of Northern Illinois University for use by students in their computer science classes. After installation of z390 v1.4.01 enter the command ASSIST assist\DEMOAST1 for demo.
2. Following IBM's announcement of a new z10 mainframe on February 26 during SHARE, a total of 226 new z10 instructions have been added to z390 for use by students learning about the z10 and for developers wanting unit test code before implementing on the new z10 processors. The new z10 instructions include:
a. Compare and branch - based on z390 testing these appear to be 15% faster than the equivalent compare followed by branch on condition instructions.
b. Move with optional specifications - this instruction which was previously implemented based on preliminary information released at SHARE has been expanded to support lengths greater than 4k.
c. The new translate and test extended instructions now support forword and backward translation for any length with 4 different translate table sizes 256, 512, 64k, and 128k.
d. The new rotate and select bits intructions have been implemented along with an improvement in the speed for existing RLL and RLLG rotate instructions which now use new more efficient shared rotate functions.
Since the new z10 instructions did not include the SQXTR extended decimal floating point square root instructions, the first proto-type millicode z390 version of this instruction has been implemented. To see how SQXTR instruction works, see the DFP solution to the standard deviation contest problem #12. To run the program, enter the command ASMLG mfacc\P12DSH3 after installation of z390 v1.4.01. Also see ZMFACC Mainframe Assembler Coding Contest problem #18 requiring benchmark program for compare and branch on the new z10 mainframe:
http://z390.sourceforge.net/z390_Mainframe_Assemble_Coding_Contest.htm
Don Higgins
don@higgins.net
1. The ASSIST instructions for simplifying assembler program I/O have been added at the request of Northern Illinois University for use by students in their computer science classes. After installation of z390 v1.4.01 enter the command ASSIST assist\DEMOAST1 for demo.
2. Following IBM's announcement of a new z10 mainframe on February 26 during SHARE, a total of 226 new z10 instructions have been added to z390 for use by students learning about the z10 and for developers wanting unit test code before implementing on the new z10 processors. The new z10 instructions include:
a. Compare and branch - based on z390 testing these appear to be 15% faster than the equivalent compare followed by branch on condition instructions.
b. Move with optional specifications - this instruction which was previously implemented based on preliminary information released at SHARE has been expanded to support lengths greater than 4k.
c. The new translate and test extended instructions now support forword and backward translation for any length with 4 different translate table sizes 256, 512, 64k, and 128k.
d. The new rotate and select bits intructions have been implemented along with an improvement in the speed for existing RLL and RLLG rotate instructions which now use new more efficient shared rotate functions.
Since the new z10 instructions did not include the SQXTR extended decimal floating point square root instructions, the first proto-type millicode z390 version of this instruction has been implemented. To see how SQXTR instruction works, see the DFP solution to the standard deviation contest problem #12. To run the program, enter the command ASMLG mfacc\P12DSH3 after installation of z390 v1.4.01. Also see ZMFACC Mainframe Assembler Coding Contest problem #18 requiring benchmark program for compare and branch on the new z10 mainframe:
http://z390.sourceforge.net/z390_Mainframe_Assemble_Coding_Contest.htm
Don Higgins
don@higgins.net
Monday, February 11, 2008
Come to SHARE Session 8194 Feb. 25, 2008 to learn about z390 VSAM and CICS support
Come to the Disney World Coronado Springs Resort in Orlando Florida on February 25, 2008 and attend SHARE Session 8194 at 4:30 in Coronado E for update on z390 VSAM and CICS support. Speakers will include Melvyn Maltz and Don Higgins. Melvyn will provide update on EXEC CICS V4 compatible support including multiple TN3270 clients on TCP/IP network and browse support for ESDS, RRDS, and KSDS VSAM files. Don will provide overview of the z390 portable mainframe assembler and emulator plus update on VSAM externals and internals including KSDS insert support using AVL balanced trees for maximum performance. For more information on SHARE in Orlando and Session 894 visit:
http://share.org/events/Orlando/index.cfm
Don Higgins
don@higgins.net
http://share.org/events/Orlando/index.cfm
Don Higgins
don@higgins.net
Wednesday, December 12, 2007
z390 Mainframe Assembler Coding Contest
Checkout the new z390 mainframe assembler coding problems and submitted solutions here:
http://z390.sourceforge.net/z390_Mainframe_Assemble_Coding_Contest.htm
You can join the growing group of participants and submit as many problems and solutions as your like.
Don Higgins
don@higgins.net
http://z390.sourceforge.net/z390_Mainframe_Assemble_Coding_Contest.htm
You can join the growing group of participants and submit as many problems and solutions as your like.
Don Higgins
don@higgins.net
Thursday, October 25, 2007
z390 source and downloads now on sourceforge.net
The open source z390 Portable Mainframe Assembler and Emulator source and release downloads are now available from mirrorded z390 project site at
http://z390.sourceforge.net
The source is now in CVS form and can be browsed via the web here:
http://z390.cvs.sourceforge.net/z390/z390/
Don Higgins
don@higgins.net
http://z390.sourceforge.net
The source is now in CVS form and can be browsed via the web here:
http://z390.cvs.sourceforge.net/z390/z390/
Don Higgins
don@higgins.net
Friday, October 05, 2007
VSAM and CICS compatible support in z390 v1.3.08
This week z390 v1.3.08 was published for download and install via InstallShield for Windows Vista and XP along with file image for Linux installs. This version has new VSAM support including ESDS, RRDS, VRRDS, and KSDS support for random and skip sequential access by primary key. Also in this release of z390 is V3 of CICS compatible support developed by Melvyn Maltz including new BED9 test transaction to create ESDS file and then CEBR transaction to browse the file forward and backword via PF7 and PF8 keys and toggle record formates between EBCDIC, ASCII, and hex using PF2 key.
All the documentation has updated with links from www.z390.org. Demo and regression tests are also included.
Don Higgins
don@higgins.net
All the documentation has updated with links from www.z390.org. Demo and regression tests are also included.
Don Higgins
don@higgins.net
Saturday, August 25, 2007
z390 SHARE Session Update
z390 SHARE sessions have been held at the February and August 2007 conferences. Martin Trubner from Germany presented the last session in San Diego providing z390 user perspective. For more information visit:
www.automatedsoftwaretools.com/z390/SHARE_z390_Assembler_and_Emulator_Presentations.htm
Planning is now underway for z390 SHARE session in Orlando in February 2008 with both Don Higgins and Melvyn Maltz presenting updates on z390 support for VSAM and CICS. Plan to attend.
Don Higgins
don@higgins.net
www.automatedsoftwaretools.com/z390/SHARE_z390_Assembler_and_Emulator_Presentations.htm
Planning is now underway for z390 SHARE session in Orlando in February 2008 with both Don Higgins and Melvyn Maltz presenting updates on z390 support for VSAM and CICS. Plan to attend.
Don Higgins
don@higgins.net
z390 new VSAM assembler application support
Starting with version 1.3.07, z390 now supports VSAM assembler applications. The initial support includes ESDS files using macros for ACB, RPL, OPEN, CLOSE, GET, PUT, SHOWCB, TESTCB, and MODCB. A new utility REPRO written in structured macro assembler is included to load or unload VSAM file from/to QSAM file or another VSAM file. Fixed or variable length records up to 2 GB are supported. Demo application programs with fixed and variable length ESDS VSAM files are included. For more information visit:
http://www.automatedsoftwaretools.com/z390/z390_VSAM_Compatible_Assembler_Support.htm
Don Higgins
don@higgins.net
http://www.automatedsoftwaretools.com/z390/z390_VSAM_Compatible_Assembler_Support.htm
Don Higgins
don@higgins.net
z390 new CICS compatible transaction manager
z390 version 1.3.05 now has a CICS compatible transaction manager V2 developed by Melvyn Maltz which supports EXEC CICS assembler programs. Commands supported include EXEC SEND, RECEIVE, LOAD, LINK, XCTL, RETURN, HANDLE, ABEND, PUSH, POP, RELEASE, GETMAIN, and FREEMAIN. A z390 CICS transaction manager server can support multiple local and remote TN3270 compatible clients connected over TCP/IP network. All of the code is open source. To start a server run z390\cics\z390cics.390 and to start a client run z390\cics\z390kcp with IP address of the server processor. To see an example, enter the transaction code GUI6 to start a conversational CICS transaction which displays several fields (name, address, zip) and supports updating fields plus PF1 help key and PF3 exit key. For more information visit:
http://www.automatedsoftwaretools.com/z390/z390_EXEC_CICS_Compatible_Assembler_Support.htm
Don Higgins
don@higgins.net
http://www.automatedsoftwaretools.com/z390/z390_EXEC_CICS_Compatible_Assembler_Support.htm
Don Higgins
don@higgins.net
Tuesday, June 12, 2007
How to speed up Java emulator by 50%
z390 release v1.3.04 includes simple change to the pz390.java source to speed up the emulator
by 50% with new BCT loop speed of 1.6 MIPS on a 2.1 GHZ Intel dual core processor. The only change made was to split the primary and seconardary operation code switches into separate functions which results in smaller working set for the generated Java byte code. On cached pipeline processors this can dramatically improve performance.
Don Higgins
don@higgins.net
by 50% with new BCT loop speed of 1.6 MIPS on a 2.1 GHZ Intel dual core processor. The only change made was to split the primary and seconardary operation code switches into separate functions which results in smaller working set for the generated Java byte code. On cached pipeline processors this can dramatically improve performance.
Don Higgins
don@higgins.net
EXEC CICS compatible tranaction manager in z390 v1.3.04
The latest z390 version v1.3.04 has new EXEC CICS compatible transaction manager contributed in open source z390 assembler contributed by Melvyn Maltz. This new tool supports multiple clients connected to server on a TCP/IP network. The initial release includes support for EXEC CICS SEND, RECEIVE, LOAD, LINK, XCTL, and RETURN commands and uses z390 GUAM TN3270 support for clients. Documentation and examples are included in the release stored in cics directory.
Don Higgins
don@higgins.net
Don Higgins
don@higgins.net
Wednesday, April 18, 2007
z390 SUPERZAP utility available in v1.3.03
A new version of the old SUPERZAP file utility is available in z390 v1.3.03. This utility is distributed as open source as part of z390 and consists of about 850 lines of structured mainframe macro assembler. The utility supports the verification, replacement, and dumping of file contents in hex, ASCII, or EBCDIC. Files up to 2 GB on Windows or Linux are supported. Addition commands are supported to search for hex or text values and a loop command allows repeating search, verify, replace, and/or dump commands until verify fails or end of file is reached. For more information on this utility visit www.superzap.net.
This utility illustrates the power of structured mainframe assembler for use in utilities and applications running on not only on mainframes but also Windows and Linux platforms. SUPERZAP uses new extension in z390 v1.3.03 to set DCB record lengths up to 31 bits thus allowing utility to read or write an entire file up to 2 GB with a single GET or PUT.
SUPERZAP has been around as a mainframe utility from at least the early S/360 days for applying Private Temporary Fixes (PTF's) to operating system code. Today it is called SPZAP or AMASPZAP and is documented in the DFSMS Diagnosis Tools manual. See reference links on the www.superzap.net page.
Don Higgins
don@higgins.net
This utility illustrates the power of structured mainframe assembler for use in utilities and applications running on not only on mainframes but also Windows and Linux platforms. SUPERZAP uses new extension in z390 v1.3.03 to set DCB record lengths up to 31 bits thus allowing utility to read or write an entire file up to 2 GB with a single GET or PUT.
SUPERZAP has been around as a mainframe utility from at least the early S/360 days for applying Private Temporary Fixes (PTF's) to operating system code. Today it is called SPZAP or AMASPZAP and is documented in the DFSMS Diagnosis Tools manual. See reference links on the www.superzap.net page.
Don Higgins
don@higgins.net
Tuesday, March 13, 2007
z390 now supports VSE assembler programs
With the release of z390 v1.3.02b PTF there is a new VSE macro library which maps VSE assembler macros into z390 MVS compatible macro code which can be assembled, linked, and executed on Windows, Linux, or any platform supporting z390 running on J2RE 1.5.0+.
Several demos and regression tests are include to illustrate the use of VSE marcros such as COMRG, GETTIME, CDLOAD, CDDELETE, GETVIS, FREEVIS, OPEN, DTFSD, DTFPR, GET, PUT, CLOSE, and EOF.
Don Higgins
don@higgins.net
Several demos and regression tests are include to illustrate the use of VSE marcros such as COMRG, GETTIME, CDLOAD, CDDELETE, GETVIS, FREEVIS, OPEN, DTFSD, DTFPR, GET, PUT, CLOSE, and EOF.
Don Higgins
don@higgins.net
Saturday, February 17, 2007
SHARE Session 2845 z390 Portable Mainframe Assembler and Emulator
SHARE was held in Tampa Florida during the past week, and I had the opportunity to present a session on the z390 Portable Mainframe Assembler and Emulator. One question from the session was whether z390 could be run on z Series machines using Linux/390. To date z390 has only been fully tested on Windows and Ubuntu Linux 6.06 LTS and J2RE 1.5.0_10. However since Ubuntu Linux and Linux/390 both conform to the new Linux Foundation core standard and since both support the J2RE 1.5 Java code base from Sun Microsystems, I see no reason why z390 should not run on Linux/390. Although it would be slower than native assembler of course, if the process is I/O bound, then speed may not be an issue. The potential benefit is to have assembler application code that is portable across both OS's and hardward platforms.
I attended several other sessions at the SHARE in Tampa and perhaps the most interesting for me was the session on Linux and Open Source by Jim Elliott with IBM Canada. He presented the results of a recent Gartner survey showing server growth statistics for different OS's. Linux growth was up 31%, Windows server growth was up 12%, Unix server growth was up 4% and all other servers were in decline by 22%. It seems to me that there is a clear message here about the future of Linux and other open source tools such as Java, Eclipse, and z390.
I attended several other sessions at the SHARE in Tampa and perhaps the most interesting for me was the session on Linux and Open Source by Jim Elliott with IBM Canada. He presented the results of a recent Gartner survey showing server growth statistics for different OS's. Linux growth was up 31%, Windows server growth was up 12%, Unix server growth was up 4% and all other servers were in decline by 22%. It seems to me that there is a clear message here about the future of Linux and other open source tools such as Java, Eclipse, and z390.
Thursday, January 11, 2007
z390 Service Oriented Architecture Support
With z390 PTF v1.2.00g new Service Oriented Architecture (SOA) support has been added. A new macro TCPIO and svc x'7c' now support TCP/IP sockets messaging. In addition a new SOA client server application generator macro facility has been added along with a demo application. The demo consists of a main proram and two called subroutines. As a base line, the demo can be assembled, statically linked, and executed. Then the SOAGEN macro facility can be used to generate client and server message managers plus stubs for each called serivce. See the new z390 Service Oriented Architecture User Guide here:
http://www.automatedsoftwaretools.com/z390/z390_Service_Oriented_Architecture_User_Guide.pdf
Don Higgins
don@higgins.net
http://www.automatedsoftwaretools.com/z390/z390_Service_Oriented_Architecture_User_Guide.pdf
Don Higgins
don@higgins.net
Monday, December 25, 2006
z390 Supports new Decimal Floating Point (DFP) instructions
The latest PTF update v1.2.00f for the z390 portable mainframe assembler now includes support for 57 new Decimal Floating Point (DFP) instructions. The z390 macro assembler now supports 3 new data types: ED for 7 digits, DD for 16 digits, and LD for 34 digits. These new instructions and data formats plus the z390 extended macros (CTD and CFD) for conversion to and from decimal scientific notation, enable assembler programs to perform decimal arithmetic with the same precision and ease as Excel without those annoying rounding errors that creep in when using hex HFP or binary BFP floating point. For example, the addition of 1.1 + 2.2 equals exactly 3.3 when using the new DFP instructions where as the result is 3.30......03 when using HFP or BFP due to the inexact conversion between base 10 and base 2. The PTF open source for z390 includes the pz390.java emulator code for these new instructions plus new regression test TESTDFP1.MLC with examples of each instruction.
Friday, November 17, 2006
z390 v1.2 now running on Linux as well as Windows
With the release of z390 v1.2 there is now support for running z390 GUI and command line interfaces on Linux as well as Windows XP or 2000. Visit www.390.org for more details.
z390 version 1.2 also has new macro pseudo code generator for 300% improvment in macro intensive macro assembly processing. The macro pseudo code support also includes new
detail TRACEP option which shows value of every macro variable used in AIF, SETA, SETB, and SETC statements executed.
Don Higgins
don@higgins.net
z390 version 1.2 also has new macro pseudo code generator for 300% improvment in macro intensive macro assembly processing. The macro pseudo code support also includes new
detail TRACEP option which shows value of every macro variable used in AIF, SETA, SETB, and SETC statements executed.
Don Higgins
don@higgins.net
Saturday, July 08, 2006
z390 Release 1.1.01 increases MIPS demo speed by 50%
On July 7, 2006 the www.z390.org site published version 1.1.01 which has a significant performace improvement for the open source z390 J2SE Java runtime emulator which increased the speed of the www.mfatc.org MIPS calculation demo by over 50%. The speed increase was achieved by tuning the pz390 emulator code to use 4 smaller table switches to index opcodes instead of one 256 entry switch table for the primary opcode. A new version of the z390 instruction speed caculation contributed by Melvyn Maltz was also published so you can see individual z processor instruction speeds for z390 along with comparison to earlier base line speeds:
http://www.automatedsoftwaretools.com/z390/z390_Benchmark_Instruction_Timing.htm
http://www.automatedsoftwaretools.com/z390/z390_Benchmark_Instruction_Timing.htm
Monday, July 03, 2006
www.mfatc.org now has 3 demos in HLASM, HLA, C++, COBOL, and Java
The www.mfatc.org site now has 3 demos in HLASM, HLA, C++, COBOL, and Java which you can download, compile, and execute using free compilers and runtimes available for Windows 2000 and XP in InstallShield format. The demos currently include:
1. HELLO - Display "Hello World"
All 5 source versions only require 4-5 lines of souce code.
2. POWERS - Display powers of 2 from 0 to 31
All 5 demos use structured programming support to perform a loop which calculates and displays each power. The souce code sizes range from 9 lines for C++ to 23 lines for z390 mainframe assembler which does its own packed decimal text formatting for WTO.
3. MIPS - Calculate MIPS rating for simple loop decrementing 32 bit integer until 0
All 5 demos use structured programming support to perform a loop which decrements 32 bit integer until 0 and uses the difference in starting time versus ending time to calculate approximate millions of instructions per second. The lines of source code range from 28 for C++ to 70 for COBOL which required time and date record layouts. The initial results using a Dell 3.05 GHZ Pentium 4 processor running Windows XP are quite revealing:
1. z390 - 0.9 MIPS (This is the slowest due to overhead of mainframe instruction emulation written in Java which compiles to portable virtual machine code.)
2. HLA - 5840 MIPS (I'm amazed that HLA generated ASM code optimized to take maximum advantage of the Pentium 4 hardward pipelining can perform up to 2 instructions per clock cycle. HLA is definitely the language to use for optimizing code speed on Intel hardware.)
3. C++ - 776 MIPS (The ASM code generated by the Visual C++ Express compiler performs 6 instructions with 3 memory fetches resulting in the slower but still impressive MIP rating).
4. COBOL - 68 MIPS (The ASM code generated by the COBOL compiler performs 22 instructions per loop to convert BigIndian integer field in memory to Little Indian format in memory work area to perform decrement and then converts again to store and fetch for compare to zero resulting in the slower speed.)
5. Java - 1430 MIPS (The J2SE Java compiler generated a 4 instruction Java Virtual Macine loop and the J2SE runtime optimized its execution to out perform C++ by almost 2 to 1 which is very impressive).
Now I'm highly motivated to do further research on how to improve the z390 emulation performance and hope to include some initial improvements in the next z390 v1.1.01 release. However even 0.9 MIPS for mainframe execution on your Windows desktop is not bad. Some may remember that PC/370 started at 25,000 instructions per second on a 4 MHZ z80 chip and that was fast enough of a lot of I/O bound applications.
1. HELLO - Display "Hello World"
All 5 source versions only require 4-5 lines of souce code.
2. POWERS - Display powers of 2 from 0 to 31
All 5 demos use structured programming support to perform a loop which calculates and displays each power. The souce code sizes range from 9 lines for C++ to 23 lines for z390 mainframe assembler which does its own packed decimal text formatting for WTO.
3. MIPS - Calculate MIPS rating for simple loop decrementing 32 bit integer until 0
All 5 demos use structured programming support to perform a loop which decrements 32 bit integer until 0 and uses the difference in starting time versus ending time to calculate approximate millions of instructions per second. The lines of source code range from 28 for C++ to 70 for COBOL which required time and date record layouts. The initial results using a Dell 3.05 GHZ Pentium 4 processor running Windows XP are quite revealing:
1. z390 - 0.9 MIPS (This is the slowest due to overhead of mainframe instruction emulation written in Java which compiles to portable virtual machine code.)
2. HLA - 5840 MIPS (I'm amazed that HLA generated ASM code optimized to take maximum advantage of the Pentium 4 hardward pipelining can perform up to 2 instructions per clock cycle. HLA is definitely the language to use for optimizing code speed on Intel hardware.)
3. C++ - 776 MIPS (The ASM code generated by the Visual C++ Express compiler performs 6 instructions with 3 memory fetches resulting in the slower but still impressive MIP rating).
4. COBOL - 68 MIPS (The ASM code generated by the COBOL compiler performs 22 instructions per loop to convert BigIndian integer field in memory to Little Indian format in memory work area to perform decrement and then converts again to store and fetch for compare to zero resulting in the slower speed.)
5. Java - 1430 MIPS (The J2SE Java compiler generated a 4 instruction Java Virtual Macine loop and the J2SE runtime optimized its execution to out perform C++ by almost 2 to 1 which is very impressive).
Now I'm highly motivated to do further research on how to improve the z390 emulation performance and hope to include some initial improvements in the next z390 v1.1.01 release. However even 0.9 MIPS for mainframe execution on your Windows desktop is not bad. Some may remember that PC/370 started at 25,000 instructions per second on a 4 MHZ z80 chip and that was fast enough of a lot of I/O bound applications.
Wednesday, June 07, 2006
www.MFATC.org mainframe assembler, MASM, C++, COBOL, and Java comparisons
Mainframe assembler developers as well as other developers may find www.MFATC.org and its discussion group useful as it has a growing collection of coding examples in z390 mainframe assembler, MASM Intel assembler, C++, COBOL, and Java. The first example is a Hello World program in each language along with help information to download and install free software to run each example on Windows 2000 or XP.
Don Higgins
don@higgins.net
Don Higgins
don@higgins.net
Subscribe to:
Posts (Atom)